It is sometimes desirable to remove one or more layers from an integrated circuit die, and the delayering process is performed using mechanical or chemical means. However, it is also desirable that the surface of the die remain planar during the delayering process, which can be difficult given the extremely small size of the die, and in practice, the edges of the die often become rounded.
This background discussion is intended to provide information related to the present invention which is not necessarily prior art.